Kampen, C.; Burenkov, A.; Kunder, D.; Baer, E.; Lorenz, J.:
Determination of across-wafer variations of transistor characteristics by coupling equipment simulation with technology computer-aided design (TCAD). (Conference on Multiphysics Simulation - Advanced Methods for Industrial Engineering <1, 2010, Bonn>)
Fraunhofer-Institut für Algorithmen und Wissenschaftliches Rechnen -SCAI-, Sankt Augustin: 1st International Conference on Multiphysics Simulation - Advanced Methods for Industrial Engineering. Proceedings. CD-ROM: June 22-23, 2010, Bonn, Germany. Sankt Augustin: Scapos, 2010, 9 pp.
urn:nbn:de:0011-n-1342010
Volltext
Fraunhofer IISB

Burenkov, A.; Kampen, C.; Bär, E.; Lorenz, J.:
Impact of technological options for 22 nm SOI CMOS transistors on IC performance. (EUROSOI Conference <6, 2010, Grenoble>)
Cristoloveanu, S.: EUROSOI 2010, Sixth Workshop of the Thematic Network on Silicon on Insulator Technology, Devices and Circuits. Proceedings: 25-27 January, 2010, Grenoble, France. Grenoble, 2010, pp. 43-44
urn:nbn:de:0011-n-1174626
Volltext
Fraunhofer IISB

Kunder, D.; Baer, E.; Sekowski, M.; Pichler, P.; Rommel, M.:
Simulation of focused ion beam etching by coupling a topography simulator and a Monte-Carlo sputtering yield simulator. (International Conference on Micro and Nano Engineering (MNE 2009) <35, 2009, Ghent>)
Microelectronic engineering, Vol.87 (2010), No.5-8, pp.1597-1599
info:doi/10.1016/j.mee.2009.11.007
Fraunhofer IISB

Burenkov, A.; Kampen, C.; Baer, E.; Lorenz, J.; Ryssel, H.:
Application-driven simulation of nanoscaled CMOS transistors and circuits
Journal of computational and theoretical nanoscience, Vol.5 (2008), No.6, pp.1170-1182
info:doi/10.1166/jctn.2008.015
Fraunhofer IISB

Kunder, D.; Baer, E.:
Comparison of different methods for simulating the effect of specular ion reflection on microtrenching during dry etching of polysilicon
Microelectronic engineering, Vol.85 (2008), No.5-6, pp.992-995
info:doi/10.1016/j.mee.2008.01.038
Fraunhofer IISB

Kistler, S.:
Dreidimensionale Topographiesimulation der ionisierten Metallplasma-Abscheidung in der Halbleitertechnologie
Erlangen-Nürnberg, Univ., Diss., 2006
urn:nbn:de:bvb:29-opus-4600
Fraunhofer IISB

Schnattinger, T.; Bär, E.; Erdmann, A.:
A fast development simulation algorithm for discrete resist models. (International Conference on Micro- and Nano-Engineering (MNE) <31, 2005, Vienna>)
Loeschner, H.: 31st International Conference on Micro- and Nano-Engineering 2005. Proceedings: 19 - 22 September 2005, Vienna, Austria. Amsterdam: Elsevier, 2006. (Microelectronic engineering 83.2006,4/9), pp. 1008-1011
info:doi/10.1016/j.mee.2006.01.121
Fraunhofer IISB

Schnattinger, T.; Bär, E.; Erdmann, A.:
Mesoscopic resist processing simulation in optical lithography. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <2006, Monterey/Calif.>)
Institute of Electrical and Electronics Engineers -IEEE-: International Conference on Simulation of Semiconductor Processes and Devices. SISPAD 2006. Proceedings: September 6-8, 2006, Monterey, California. Piscataway, NJ, USA: IEEE Press, 2006, pp. 341
info:doi/10.1109/SISPAD.2006.282905
Fraunhofer IISB

Schnattinger, T.; Baer, E.; Erdmann, A.:
Three-dimensional resist development simulation with discrete models
Journal of vacuum science and technology B. Microelectronics and nanometer structures, Vol.24 (2006), No.6, pp.3040-3043
info:doi/10.1116/1.2397071
Fraunhofer IISB

Schnattinger, T.; Bär, E.:
Comparison of different approaches for the simulation of topography evolution during lithography development. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <2005, Tokio>)
Japan Society of Applied Physics -JSAP-: SISPAD 2005. Proceedings: 1.-3. September 2005, Tokio. Osaka: JSAP, 2005, pp. 215-218
Fraunhofer IISB

Bär, E.; Lorenz, J.; Ryssel, H.:
3D feature-scale simulation of sputter etching with coupling to equipment simulation. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <2004, München>)
Wachutka, G.: Simulation of Semiconductor Processes and Devices 2004. Wien: Springer, 2004, pp. 339-342
Fraunhofer IISB

Nguyen, P.-H.; Burenkov, A.; Lorenz, J.:
Adaptive surface triangulations for 3D process simulation. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <2004, München>)
Wachutka, G.: Simulation of Semiconductor Processes and Devices 2004. Wien: Springer, 2004, pp. 161-164
Fraunhofer IISB

Nguyen, P.-H.; Bär, E.; Lorenz, J.; Ryssel, H.:
Modeling of chemical-mechanical polishing on patterned wafers as part of integrated topography process simulation. (European Workshop on Materials for Advanced Metallization (MAM) <2004, Brussels>)
Beyer, G.: Materials for advanced metallization: Proceedings of the European Workshop on Materials for Advanced Metallization 2003: Brussels, Belgium, March 7 - 10, 2004. Amsterdam: Elsevier, 2004. (Microelectronic engineering 76.2004, 1/4), pp. 89-94
info:doi/10.1016/j.mee.2004.07.018
Fraunhofer IISB

Pfitzner, L.; Bär, E.; Frickinger, J.; Nguyen, H.; Nutsch, A.:
Polierverfahren in der Halbleiterfertigung. (Freiberger Siliciumtage <2003, Freiberg>)
Möller, H.J. et al.: Halbleitermaterialien, Prozesstechnologie und Diagnostik: Freiberger Siliciumtage 2003, Freiberger Forschungsforum, 54. Berg- und Hüttenmännischer Tag 2003, 19. bis 21. Juni 2003. Freiberg: TU Bergakademie, 2004. (Freiberger Forschungshefte. B 327), pp. 136-152
Fraunhofer IISB

Kistler, S.; Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of ionized metal plasma vapor deposition. (European Workshop on Materials for Advanced Metallization (MAM) <2004, Brussels>)
Beyer, G.: Materials for advanced metallization: Proceedings of the European Workshop on Materials for Advanced Metallization 2003: Brussels, Belgium, March 7 - 10, 2004. Amsterdam: Elsevier, 2004. (Microelectronic engineering 76.2004, 1/4), pp. 100-105
info:doi/10.1016/j.mee.2004.07.021
Fraunhofer IISB

Nguyen, P.H.; Hofmann, K.R.; Paasch, G.:
Comparative full-band Monte Carlo study of Si and Ge with screened pseudopotential-based phonon scattering rates
Journal of applied physics, Vol.94 (2003), No.1, pp.375-386
info:doi/10.1063/1.1579860
Fraunhofer IISB

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of superconformal copper deposition based on the curvature-enhanced accelerator coverage mechanism. (Electrochemical Society (Fall Meeting) <2003, Orlando/Fla.>)
Mathad, G.S.: Copper Interconnects. New Contact Metallurgies/Structures, and Low-k Interlevel Dielectrics II. Pennington, NJ: ECS, 2003. (Electrochemical Society. Proceedings 2003,10), pp. 21-27
Fraunhofer IISB

Lenhart, O.; Bär, E.:
Three-dimensional triangle-based simulation of etching processes and applications
IEICE Transactions on Electronics, (2003), No.3, pp.427-432
Fraunhofer IISB

Lenhart, O.; Ryssel, H.:
Algorithmen für die dreiecksbasierte dreidimensionale Simulation bewegter Oberflächen in der Halbleitertechnologie
Erlangen: Shaker, 2002
(Erlanger Berichte Mikroelektronik 5/2002)
Zugl.: Erlangen-Nürnberg, Univ., Diss., 2002
ISBN 3-8322-0960-3
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Simulation of the influence of via sidewall tapering on step coverage of sputter-deposited barrier layers
Microelectronic engineering, Vol.64 (2002), pp.321-328
info:doi/10.1016/S0167-9317(02)00805-5
Fraunhofer IIS-B

Lenhart, O.; Bär, E.:
Three-dimensional triangle-based simulation of etching processes. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <7, 2002, Kobe>)
Japan Society of Applied Physics -JSAP-: Simulation of Semiconductor Processes and Devices. SISPAD 2002: September 4-6, 2002. Proceedings. Piscataway, NJ: IEEE, 2002, pp. 127-130
info:doi/10.1109/SISPAD.2002.1034533
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
3D simulation of the conformality of copper layers deposited by low-pressure chemical vapor deposition from cul(tmvs)(hfac). (European Workshop on Materials for Advanced Metallization (MAM) <3, 1999, Ostende>)
Vantomme, A.: Materials for advanced metallization. Proceedings of the Third European Workshop on Materials for Advanced Metallization. Amsterdam: Elsevier, 2000. (Microelectronic engineering 50.1999, 1/4)
Fraunhofer IIS-B

Bär, E.; Lorenz, J.:
Control and Improvement of Surface Triangulation for Three-Dimensional Process Simulation
IEICE Transactions on Electronics, Vol.EC83 (2000), No.8, pp.1338-1342
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-Dimensional Simulation of the Conformality of Copper Layers Deposited by Low-Pressure Chemical Vapor Deposition from CuI(tmvs)(hfac)
Microelectronic engineering, Vol.50 (2000), pp.481-486
info:doi/10.1016/S0167-9317(99)00318-4
Fraunhofer IIS-B

Bär, E.; Lorenz, J.:
Control and Improvement of Surface Triangulation for Three-Dimensional Process Simulation. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <4, 1999, Tokyo>)
Institute of Electrical and Electronics Engineers -IEEE-: SISPAD '99. Proceedings. Piscataway, NJ: IEEE, 1999, pp. 75-78
Fraunhofer IIS-B

Poscher, S.; Lehnert, W.; Ryssel, H.:
Simulation of a Coating Protection for an In Situ Ellipsometer in a CVD Furnace. (European Solid-State Device Research Conference (ESSDERC) <29, 1999, Leuven>)
Maes, H.E.: 29th European Solid-State Device Research Conference 1999. Proceedings. Paris: Ed. Frontieres, 1999, pp. 676-679
Fraunhofer IIS-B

Poscher, S.; Lehnert, W.; Ryssel, H.:
Simulation of a coating protection for an In Situ Ellipsometer in a CVD Furnace. (European Solid-State Device Research Conference (ESSDERC) <29, 1999, Leuven>)
Maes, H.E.: 29th European Solid-State Device Research Conference 1999. Proceedings. Paris: Ed. Frontieres, 1999
Fraunhofer IIS-B

Poscher, S.; Ryssel, H.:
Simulation von widerstands- und lampenbeheizten Öfen für die Schichtabscheidung
Aachen: Shaker, 1999
(Erlanger Berichte Mikroelektronik 5/99)
Zugl.: Erlangen-Nürnberg, Univ., Diss., 1999
Fraunhofer IIS-B

Poscher, S.; Wellner, S.; Ryssel, H.:
Wohltemperierte Siliziumscheiben - Simulation und Messung der Temperaturverteilung in einem vertikalen Schichtabscheideofen
F und M. Feinwerktechnik, Mikrotechnik, Mikroelektronik, Vol.107 (1999), No.4, pp.65-67
Fraunhofer IIS-B

Poscher, S.; Theiler, T.:
Coupled simulation of gas flow and heat transfer in an RTP-system with rotating wafer
Materials Science in Semiconductor Processing, Vol.1 (1998), pp.201-205
info:doi/10.1016/S1369-8001(98)00044-4
Fraunhofer IIS-B

Bär, E.:
Dreidimensionale Simulation von Schichtabscheideprozessen in der Halbleitertechnologie
Erlangen-Nürnberg, Univ., Diss., 1998
urn:nbn:de:0011-n-67927
Volltext
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Experimental verification of three-dimensional simulations of LTO layer deposition on structures prepared by anisotropic wet etching of silicon. (Dielectrics in Microelectronics Workshop <1996, Venice>)
Microelectronics reliability, Vol.38 (1998), No.2, pp.287-291
info:doi/10.1016/S0026-2714(97)00039-5
Fraunhofer IIS-B

Poscher, S.:
Gas Flow Simulation in a Rapid Thermal Processing System
Öchsner, R. et al.: Fraunhofer-Institut für Integrierte Schaltungen, Bereich Bauelementetechnologie. Leistungen und Ergebnisse. Jahresbericht 1997. Erlangen: IIS-B, 1998, pp. 36-37
Fraunhofer IIS-B

Bär, E.; Henke, W.; List, S.; Lorenz, J.:
Integrated three-dimensional topography simulation and its application to dual-damascene processing. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <3, 1998, Leuwen>)
Meyer, K. de et al.: SISPAD 98. Simulation of semiconductor processes and devices. Wien: Springer, 1998, pp. 406
Fraunhofer IIS-B
Fraunhofer ISIT

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of layer deposition
Microelectronics journal, Vol.29 (1998), No.11, pp.799-804
info:doi/10.1016/S0026-2692(97)00094-3
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of SiO2 profiles from TEOS-sourced remote microwave plasma-enhanced chemical vapor deposition. (European Solid-State Device Research Conference (ESSDERC) <28, 1998, Bordeaux>)
Touboul, A. et al.: ESSDERC '98. Paris: Ed. Frontieres, 1998, pp. 340-343
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
3D simulation for sub-micron metallization. (European Materials Research Society (Spring Meeting) <1996, Strasbourg>)
Microelectronic engineering, Vol.33 (1997), pp.397-405
info:doi/10.1016/S0167-9317(96)00070-6
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
3D simulation of sputter deposition of titanium layers in contact holes with high aspect ratios. (European Workshop on Materials for Advanced Metallization (MAM) <2, 1997, Villard de Lans>)
Societe Francaise du Vide -SFV-, Paris: MAM '97. Abstracts booklet. Paris, 1997. (Le vide 283), pp. 131
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
3D simulation of sputter deposition of titanium layers in contact holes with high aspect ratios2. (European Workshop on Materials for Advanced Metallization (MAM) <2, 1997, Villard de Lans>)
Microelectronic engineering, Vol.37/38 (1997), pp.389-395
info:doi/10.1016/S0167-9317(97)00137-8
Fraunhofer IIS-B

Popopovska, N.; Gerhard, H.; Wurm, D.; Poscher, S.; Emig, G.; Singer, R.F.:
Chemical vapor deposition of titanium nitride on carbon fibres as a protective layer in metal matrix composites. (European Materials Research Society (Spring Meeting) <1997, Strasbourg>)
Materials and design, Vol.18 (1997), No.4/6, pp.239-242
info:doi/10.1016/S0261-3069(97)00057-5
Fraunhofer IIS-B

Bär, E.; Benvenuti, A.; Henke, W.; Jünemann, B.; Kalus, C.; Niedermaier, P.; Lorenz, J.:
Integrated three-dimensional topography simulation of contact hole processing. (International Symposium on Ultra Large Scale Integration (ULSI) Science and Technology <6, 1997, Montreal>)
Massoud, H.Z. et al.: ULSI science and technology 1997. Proceedings of the Sixth International Symposium on Ultra Large Scale Integration Science and Technology. Pennington, NJ: ECS, 1997. (Electrochemical Society. Proceedings 97-3), pp. 633
Fraunhofer IIS-B
Fraunhofer ISIT

Popovska, N.; Poscher, S.; Tichy, P.; Emig, G.; Ryssel, H.:
Kinetics of chemical vapor deposition of titanium nitride. (International Conference on Chemical Vapor Deposition (CVD) <14, 1997, Paris>)
Allendorf, M.D.: Chemical vapor deposition. Proceedings of the fourteenth international conference and EUROCVD-11. Pennington, NJ: ECS, 1997. (Electrochemical Society. Proceedings 97-25), pp. 592-599
Fraunhofer IIS-B

Bär, E.; Lorenz, J.:
The PROMPT project and its application to the three-dimensional simulation of low-pressure chemical vapor deposition processes
Solid-State Electronics, Vol.41 (1997), No.7, pp.939-943
info:doi/10.1016/S0038-1101(97)00003-8
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of contact hole metallization using aluminum sputter deposition at elevated temperatures. (European Solid-State Device Research Conference (ESSDERC) <27, 1997, Stuttgart>)
Grünbacher, H.: ESSDERC '97. Proceedings of the 27th European Solid-State Device Research Conference. Paris: Ed. Frontieres, 1997, pp. 476
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of conventional and collimated sputter deposition of Ti layers into high aspect ratio contact holes. (International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <2, 1997, Cambridge/Mass.>)
IEEE Electron Devices Society: International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '97. Piscataway, NJ: IEEE, 1997, pp. 297
Fraunhofer IIS-B

Bär, E.; Lorenz, J.:
3-D simulation of LPCVD using segment-based topography discretization
IEEE transactions on semiconductor manufacturing, Vol.9 (1996), No.1, pp.67
info:doi/10.1109/66.484284
Fraunhofer IIS-B

Bär, E.; Lorenz, J.:
3D simulation of LPCVD using segment based topography discretization
IEEE transactions on semiconductor manufacturing, Vol.9 (1996), pp.67
info:doi/10.1109/66.484284
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Experimental verification of three-dimensional simulations of LTO layer deposition using geometries prepared with anisotropic wet-etching of silicon with KOH. (Workshop on Dielectrics in Microelectronics <8, 1996, Venedig>)
8th Workshop on Dielectrics in Microelectronics 1996. Abstract Book. Venedig, 1996
Fraunhofer IIS-B

Lorenz, J.; Bär, E.; Burenkov, A.; Tietzel, K.:
Mehrdimensionale Simulation halbleitertechnologischer Fertigungsschritte
Fraunhofer-Institut für Integrierte Schaltungen, Bereich Bauelementetechnologie -IIS-B-, Erlangen: Fraunhofer-Institut für Integrierte Schaltungen, Bereich Bauelementetechnologie. Leistungen und Ergebnisse. Jahresbericht 1995. Erlangen, 1996, pp. 25-28
Fraunhofer IIS-B

Schäfer, M.; Poscher, S.:
Simulation der LPCVD von Siliciumnitrid in einem Heißwand-Horizontalreaktor
Fraunhofer-Institut für Integrierte Schaltungen, Bereich Bauelementetechnologie -IIS-B-, Erlangen: Fraunhofer-Institut für Integrierte Schaltungen, Bereich Bauelementetechnologie. Leistungen und Ergebnisse. Jahresbericht 1995. Erlangen, 1996, pp. 22-24
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of layer deposition. (Conference on Numerical Methods in Engineering <2, 1996, Paris>)
European Community on Computational Methods in Applied Science -ECCOMAS-: Conference on Numerical Methods in Engineering 1996. Minisymposia et resumes Francais. Paris: CNRS, 1996, pp. 67
Fraunhofer IIS-B

Bär, E.; Lorenz, J.; Ryssel, H.:
Three-dimensional simulation of low-pressure chemical vapour deposition. (International Conference on Software for Electrical Engineering Analysis and Design <3, 1996, San Miniato>)
Silvester, P.P.: Software for electrical engineering analysis and design. Southampton: Computational Mechanics Publ., 1996, pp. 437
Fraunhofer IIS-B

Lorenz, J.; Bär, E.; Burenkov, A.; Henke, W.; Tietzel, K.; Weiß, M.:
3D simulation of topography and doping processes at FhG. (International Conference on Simulation of Semiconductor Devices and Processes (SISDEP) <6, 1995, Erlangen>)
Ryssel, H. et al.: 6th International Conference on Simulation of Semiconductor Devices and Processes. SISDEP '95. Proceedings. Wien: Springer, 1995. (Simulation of semiconductor devices and processes 6), pp. 109-135
Fraunhofer IIS-B

Bär, E.; Lorenz, J.:
3D simulation of tungsten low-pressure chemical vapor deposition in contact holes. (European Workshop on Materials for Advanced Metallization (MAM) <1, 1995, Radebeul>)
Applied surface science, Vol.91 (1995), pp.321-325
info:doi/10.1016/0169-4332(95)00138-7
Fraunhofer IIS-B

Poscher, S.; Schäfer, M.:
Simulation of a Si3N4 hot wall batch reactor
The PHOENICS journal of computational fluid dynamics and its applications, Vol.8 (1995), pp.491ff
Fraunhofer IIS-B

Lorenz, J.; Bär, E.; Burenkov, A.; Henke, W.; Tietzel, K.; Weiß, M.:
Three-dimensional simulation of topography and doping processes at FhG
Lorenz, J.: 3-dimensional process simulation. Wien/Heidelberg: Springer, 1995, pp. 109ff
Fraunhofer IIS-B

Bär, E.; Lorenz, J.:
3D Simulation of Low Pressure Chemical Vapor Deposition. (European Solid State Device Research Conference (ESSDERC) <24, 1994, Edinburgh>)
Hill, C.: ESSDERC '94. 24th European Solid State Device Research Conference. Proceedings. Gif-sur-Yvette: Editions Frontieres, 1994, pp. 335-338
Fraunhofer IIS-B